modm API documentation
External Interrupt Handler

Classes

class  modm::platform::IntHandler
 

Macros

#define MODM_EXTINT_HANDLER_STORAGE   sizeof(void*)
 

Enums

enum  modm::platform::IntPriority : uint8_t { Highest = 0x00, Default = 0x80, Lowest = 0xff }
 
enum  InputTrigger : uint32_t {
  None = 0x00u, LowLevel = 0x01u, HighLevel = 0x02u, BothLevels = LowLevel | HighLevel,
  FallingEdge = 0x04u, RisingEdge = 0x08u, BothEdges = FallingEdge | RisingEdge, All = BothLevels | BothEdges
}
 

Detailed Description

lbuild module: modm:platform:extint

This driver provides an API for configuring all IRQ lines via register access.

// Powers on the LED on the low->high transition, and off on high->low.
GpioInput0::setInput();
IntHandler::connect<GpioInput0>(Gpio::InputTrigger::BothEdges,
[](Gpio::InputTrigger_t triggers) {
Led::set(!!(triggers & Gpio::InputTrigger::RisingEdge));
});
// Toggles LED each time gpio input is at the high level.
GpioInput1::setInput(Gpio::InputType::PullDown);
IntHandler::connect<GpioInput1>(Gpio::InputTrigger::HighLevel,
[](Gpio::InputTrigger_t) { Led::toggle(); });

Multicore mode

Each core can register callbacks in the same IntHandler, but for the different pins (current implementation's constraint).

Also, enable/disable and connect/disconnect calls affect the NVIC of the executing core only.

Callbacks

The callback is implemented using modm::inplace_function, therefore uses no heap, but has a fixed storage size of sizeof(void*) by default. You can increase this storage size by defining a new global storage size MODM_EXTINT_HANDLER_STORAGE=bytes in your project.xml:

<library>
<collectors>
<collect name="modm:build:cppdefines">MODM_EXTINT_HANDLER_STORAGE=12</collect>
</collectors>
</library>

IRQ Types

You can explicitly enable or disable handling of the specific IRQ type in your project.xml:

<library>
<options>
<option name="modm:platform:extint:gpio">no</option>
<option name="modm:platform:extint:qspi">yes</option>
</options>
</library>

Module Options

modm:platform:extint:gpio: Enable IRQ support for GPIO

Generated with: yes in [yes, no]

modm:platform:extint:qspi: Enable IRQ support for QSPI

Generated with: no in [yes, no]

Enumeration Type Documentation

Priority level of 0-192 in steps of 64 for each interrupt. A higher level corresponds to a lower priority, so level 0 is the highest programmable interrupt priority. ... The processor implements only bits[7:6] of each field, bits [5:0] read as zero and ignore writes. This means writing 255 to a priority register saves value 192 to the register.

https://developer.arm.com/documentation/dui0662/b/Cortex-M0&ndash;Peripherals/Nested-Vectored-Interrupt-Controller https://developer.arm.com/documentation/dui0662/b/Cortex-M0&ndash;Peripherals/Nested-Vectored-Interrupt-Controller/Interrupt-Priority-Registers