#include <modm/platform/clock/rcc.hpp>

Classes
struct	PllFactors

Public Types
enum	PllSource : uint32_t { PllSource::Hsi = RCC_PLLCKSELR_PLLSRC_HSI, InternalClock = Hsi, PllSource::Cse = RCC_PLLCKSELR_PLLSRC_CSI, PllSource::Hse = RCC_PLLCKSELR_PLLSRC_HSE, ExternalClock = Hse, ExternalCrystal = Hse }

enum	SystemClockSource : uint32_t { Hsi = RCC_CFGR_SW_HSI, Hse = RCC_CFGR_SW_HSE, InternalClock = Hsi, ExternalClock = Hse, ExternalCrystal = Hse, Pll1P = RCC_CFGR_SW_PLL1 }

enum	RealTimeClockSource : uint32_t { Lsi = RCC_BDCR_RTCSEL_1, Lse = RCC_BDCR_RTCSEL_0, Hse = RCC_BDCR_RTCSEL_0 \| RCC_BDCR_RTCSEL_1, ExternalClock = Hse, ExternalCrystal = Hse, LowSpeedInternalClock = Lsi, LowSpeedExternalClock = Lse, LowSpeedExternalCrystal = Lse }

enum	WatchdogClockSource : uint32_t { LowSpeedInternalClock = 0 }

enum	AhbPrescaler : uint32_t { Div1 = RCC_D1CFGR_HPRE_DIV1, Div2 = RCC_D1CFGR_HPRE_DIV2, Div4 = RCC_D1CFGR_HPRE_DIV4, Div8 = RCC_D1CFGR_HPRE_DIV8, Div16 = RCC_D1CFGR_HPRE_DIV16, Div64 = RCC_D1CFGR_HPRE_DIV64, Div128 = RCC_D1CFGR_HPRE_DIV128, Div256 = RCC_D1CFGR_HPRE_DIV256, Div512 = RCC_D1CFGR_HPRE_DIV512 }

enum	Apb1Prescaler : uint32_t { Div1 = RCC_D2CFGR_D2PPRE1_DIV1, Div2 = RCC_D2CFGR_D2PPRE1_DIV2, Div4 = RCC_D2CFGR_D2PPRE1_DIV4, Div8 = RCC_D2CFGR_D2PPRE1_DIV8, Div16 = RCC_D2CFGR_D2PPRE1_DIV16 }

enum	Apb2Prescaler : uint32_t { Div1 = RCC_D2CFGR_D2PPRE2_DIV1, Div2 = RCC_D2CFGR_D2PPRE2_DIV2, Div4 = RCC_D2CFGR_D2PPRE2_DIV4, Div8 = RCC_D2CFGR_D2PPRE2_DIV8, Div16 = RCC_D2CFGR_D2PPRE2_DIV16 }

enum	Apb3Prescaler : uint32_t { Div1 = RCC_D1CFGR_D1PPRE_DIV1, Div2 = RCC_D1CFGR_D1PPRE_DIV2, Div4 = RCC_D1CFGR_D1PPRE_DIV4, Div8 = RCC_D1CFGR_D1PPRE_DIV8, Div16 = RCC_D1CFGR_D1PPRE_DIV16 }

enum	Apb4Prescaler : uint32_t { Div1 = RCC_D3CFGR_D3PPRE_DIV1, Div2 = RCC_D3CFGR_D3PPRE_DIV2, Div4 = RCC_D3CFGR_D3PPRE_DIV4, Div8 = RCC_D3CFGR_D3PPRE_DIV8, Div16 = RCC_D3CFGR_D3PPRE_DIV16 }

enum	PllInputRange : uint8_t { MHz1_2 = 0, MHz2_4 = 1, MHz4_8 = 2, MHz8_16 = 3 }

enum	ClockOutput1Source : uint32_t { Hsi = 0, Lse = RCC_CFGR_MCO1_0, Hse = RCC_CFGR_MCO1_1, Pll1Q = RCC_CFGR_MCO1_1 \| RCC_CFGR_MCO1_0, Hsi48 = RCC_CFGR_MCO1_2 }

enum	ClockOutput2Source : uint32_t { SystemClock = 0, Pll2P = RCC_CFGR_MCO2_0, Hse = RCC_CFGR_MCO2_1, Pll = RCC_CFGR_MCO2_1 \| RCC_CFGR_MCO2_0, Csi = RCC_CFGR_MCO2_2, Lsi = RCC_CFGR_MCO2_2 \| RCC_CFGR_MCO2_0 }

enum	CanClockSource : uint32_t { Hse = 0, Pll1Q = 0b01 << RCC_D2CCIP1R_FDCANSEL_Pos, Pll2Q = 0b10 << RCC_D2CCIP1R_FDCANSEL_Pos }

enum	CanPrescaler : uint8_t { Div1 = 0b0000, Div2 = 0b0001, Div4 = 0b0010, Div6 = 0b0011, Div8 = 0b0100, Div10 = 0b0101, Div12 = 0b0110, Div14 = 0b0111, Div16 = 0b1000, Div18 = 0b1001, Div20 = 0b1010, Div22 = 0b1011, Div24 = 0b1100, Div26 = 0b1101, Div28 = 0b1110, Div30 = 0b1111 }
	FDCAN subsystem prescaler common to all FDCAN instances.

enum	UsbClockSource : uint32_t { Disabled = 0, Pll1Q = RCC_D2CCIP2R_USBSEL_0, Pll3Q = RCC_D2CCIP2R_USBSEL_1, Hsi48 = RCC_D2CCIP2R_USBSEL_1 \| RCC_D2CCIP2R_USBSEL_0 }

enum	VoltageScaling : uint32_t { Scale3 = PWR_D3CR_VOS_0, Scale2 = PWR_D3CR_VOS_1, Scale1 = PWR_D3CR_VOS_1 \| PWR_D3CR_VOS_0, Scale0 = 0 }

enum	PowerSource : uint32_t { PowerSource::Ldo = PWR_CR3_LDOEN, PowerSource::External = PWR_CR3_BYPASS }

Static Public Member Functions
static void	setCanClockSource (CanClockSource source)

static bool	setCanPrescaler (CanPrescaler prescaler)
	Configure CAN subsystem prescaler. More...

static bool	enableInternalClock (uint32_t waitCycles=2048)

static bool	enableInternalClockMHz48 (uint32_t waitCycles=2048)

static bool	enableExternalClock (uint32_t waitCycles=2048)

static bool	enableExternalCrystal (uint32_t waitCycles=2048)

static bool	enableLowSpeedInternalClock (uint32_t waitCycles=2048)

static bool	enableLowSpeedExternalClock (uint32_t waitCycles=2048)

static bool	enableLowSpeedExternalCrystal (uint32_t waitCycles=2048)

static bool	enablePll1 (PllSource source, const PllFactors &pllFactors, uint32_t waitCycles=2048)

static bool	disablePll1 (uint32_t waitCycles=2048)

static bool	enablePll2 (PllSource source, const PllFactors &pllFactors, uint32_t waitCycles=2048)

static bool	disablePll2 (uint32_t waitCycles=2048)

static bool	enablePll3 (PllSource source, const PllFactors &pllFactors, uint32_t waitCycles=2048)

static bool	disablePll3 (uint32_t waitCycles=2048)

static bool	enableSystemClock (SystemClockSource src, uint32_t waitCycles=2048)

static bool	enableRealTimeClock (RealTimeClockSource src)

static bool	enableWatchdogClock (WatchdogClockSource)

static void	enableUsbClockSource (UsbClockSource source)

static bool	enableClockOutput1 (ClockOutput1Source src, uint8_t div)

static bool	enableClockOutput2 (ClockOutput2Source src, uint8_t div)

static bool	setAhbPrescaler (AhbPrescaler prescaler)

static bool	setApb1Prescaler (Apb1Prescaler prescaler)

static bool	setApb2Prescaler (Apb2Prescaler prescaler)

static bool	setApb3Prescaler (Apb3Prescaler prescaler)

static bool	setApb4Prescaler (Apb4Prescaler prescaler)

static bool	configurePowerSource (PowerSource source, uint32_t waitCycles=2048)
	Configure power source, has to be called exactly once early on start-up.

static bool	setVoltageScaling (VoltageScaling voltage, uint32_t waitCycles=2048)

template<uint32_t Core_Hz, uint16_t Core_mV = 3300>
static uint32_t	setFlashLatency ()

template<uint32_t Core_Hz>
static void	updateCoreFrequency ()

template<class... Signals>
static void	connect ()

template<Peripheral peripheral>
static void	enable ()

template<Peripheral peripheral>
static bool	isEnabled ()

template<Peripheral peripheral>
static void	disable ()

Static Public Attributes
static constexpr uint32_t	LsiFrequency = 32'000

static constexpr uint32_t	HsiFrequency = 64'000'000

static constexpr uint32_t	BootFrequency = 64'000'000

Detailed Description

Reset and Clock Control for STM32 devices.

This class abstracts access to clock settings on the STM32. You need to use this class to enable internal and external clock sources & outputs, set PLL parameters and AHB & APB prescalers. Don't forget to set the flash latencies.

Author: Niklas Hauser

Member Enumeration Documentation

enum modm::platform::Rcc::PllSource : uint32_t

strong

Enum Values	Documentation
Hsi	High speed internal clock (4-64 MHz)
Cse	Low speed internal clock (4MHz)
Hse	High speed external clock.

enum modm::platform::Rcc::PowerSource : uint32_t

strong

Enum Values	Documentation
Ldo	Vcore supplied from LDO.
External	Vcore supplied from external source.

Member Function Documentation

bool modm::platform::Rcc::disablePll1 ( uint32_t waitCycles = 2048 )

static

Disable PLL1.

Parameters

waitCycles Number of cycles to wait for the pll to stabilise. Default: 2048.

bool modm::platform::Rcc::disablePll2 ( uint32_t waitCycles = 2048 )

static

Disable PLL2.

Parameters

waitCycles Number of cycles to wait for the pll to stabilise. Default: 2048.

bool modm::platform::Rcc::disablePll3 ( uint32_t waitCycles = 2048 )

static

Disable PLL3.

Parameters

waitCycles Number of cycles to wait for the pll to stabilise. Default: 2048.

bool modm::platform::Rcc::enablePll1	(	PllSource	source,
		const PllFactors &	pllFactors,
		uint32_t	waitCycles = `2048`
	)

static

Enable PLL1.

Parameters

source	Source select for PLL. If you are using HSE you must enable it first (see enableHse()).
factors	Struct with all pll factors.

See also: PllFactors.

Parameters

waitCycles Number of cycles to wait for the pll to stabilise. Default: 2048.

bool modm::platform::Rcc::enablePll2	(	PllSource	source,
		const PllFactors &	pllFactors,
		uint32_t	waitCycles = `2048`
	)

static

Enable PLL2.

Parameters

source	Source select for PLL. If you are using HSE you must enable it first (see enableHse()).
factors	Struct with all pll factors.

See also: PllFactors.

Parameters

waitCycles Number of cycles to wait for the pll to stabilise. Default: 2048.

bool modm::platform::Rcc::enablePll3	(	PllSource	source,
		const PllFactors &	pllFactors,
		uint32_t	waitCycles = `2048`
	)

static

Enable PLL3.

Parameters

source	Source select for PLL. If you are using HSE you must enable it first (see enableHse()).
factors	Struct with all pll factors.

See also: PllFactors.

Parameters

waitCycles Number of cycles to wait for the pll to stabilise. Default: 2048.

static bool modm::platform::Rcc::setCanPrescaler ( CanPrescaler prescaler )

static

Configure CAN subsystem prescaler.

Warning: Configure the prescaler before enabling the CAN peripherals

Returns: true if setting the prescaler was successful

template<uint32_t Core_Hz, uint16_t Core_mV = 3300>

static uint32_t modm::platform::Rcc::setFlashLatency ( )

static

Set flash latency for CPU frequency and voltage. Does nothing if CPU frequency is too high for the available voltage.

Returns: maximum CPU frequency for voltage.

Return Values

<=CPU_Frequency	flash latency has been set correctly.
>CPU_Frequency	requested frequency too high for voltage.

The documentation for this class was generated from the following files:

rcc.hpp
rcc.cpp

Classes

Public Types

Static Public Member Functions

Static Public Attributes

Detailed Description

Member Enumeration Documentation

Member Function Documentation